Renesas Electronics

Job Purpose & Dimensions:Support One Renesas SCM Master data Project team to meet milestones & Project End GoalSupport Data migration activities in Integration ProjectSupport in User testing and validation of Master data according to the Project PlanSupport Master data governance proc

Job Purpose & Dimensions:Support One Renesas SCM Master data Project team to meet milestones & Project End GoalSupport Data migration activities in Integration ProjectSupport in User testing and validation of Master data according to the Project PlanSupport Master data governance proc

We are seeking a star performer Principal Engineer/Senior Staff engineer for an Embedded Software Architect role in our SoC system architecture department to own define and drive exploration and design of our next generation runtime software involving multi heterogeneous devices in hi

We are seeking a star performer Principal Engineer/Senior Staff engineer for an Embedded Software Architect role in our SoC system architecture department to own define and drive exploration and design of our next generation runtime software involving multi heterogeneous devices in hi

Key Responsibilities Lead subsystem/block-level closure efforts focusing on timing closure congestion resolution power integrity and physical implementation.Collaborate closely with SoC-level teams to align on clocking and floorplanning strategies leveraging strong understanding of So

Key Responsibilities Lead subsystem/block-level closure efforts focusing on timing closure congestion resolution power integrity and physical implementation.Collaborate closely with SoC-level teams to align on clocking and floorplanning strategies leveraging strong understanding of So

Key Responsibilities Lead block-level PNR activities from floorplanning through final routing ensuring robust physical implementation aligned with timing power and area goals.Drive power grid design and EM/IR-aware routing strategies to ensure block-level power integrity and reliabili

Key Responsibilities Lead block-level PNR activities from floorplanning through final routing ensuring robust physical implementation aligned with timing power and area goals.Drive power grid design and EM/IR-aware routing strategies to ensure block-level power integrity and reliabili

Collaborate with system architects and micro-architects to define high-level implementable SoC specifications.Own end-to-end SOC RTL delivery while analysing and optimizing design for power performance and area (PPA) targets. Influence SoC definition features and adopt physical design

Collaborate with system architects and micro-architects to define high-level implementable SoC specifications.Own end-to-end SOC RTL delivery while analysing and optimizing design for power performance and area (PPA) targets. Influence SoC definition features and adopt physical design

Seeking a highly motivated and innovative Senior digital design engineer with knowledge of ASIC development flow. As a Senior Staff IC Design Engineer at Renesas India you will play a crucial role in the design and development of advanced integrated circuits that power our innovative

Seeking a highly motivated and innovative Senior digital design engineer with knowledge of ASIC development flow. As a Senior Staff IC Design Engineer at Renesas India you will play a crucial role in the design and development of advanced integrated circuits that power our innovative

We are looking for an experienced and driven Senior Test Manager to oversee the test strategy and execution for DCDC converters and Power Management IC (PMIC) solutions. This leadership role requires in-depth technical knowledge of analog/mixed-signal testing volume production and col

We are looking for an experienced and driven Senior Test Manager to oversee the test strategy and execution for DCDC converters and Power Management IC (PMIC) solutions. This leadership role requires in-depth technical knowledge of analog/mixed-signal testing volume production and col

Seeking a technically strong and proactive Post-Silicon System Validation / Functional Validation Lead to drive the planning execution and debug of system-level validation of IP and SoC/MCU designs. This role is critical in verifying functional correctness feature compliance performan

Seeking a technically strong and proactive Post-Silicon System Validation / Functional Validation Lead to drive the planning execution and debug of system-level validation of IP and SoC/MCU designs. This role is critical in verifying functional correctness feature compliance performan

Impact ECS (Product Costing) Engineer role is a key position in the Renesas IT organization to support Product Costing for all aspects of SAP and other Finance Business applications.This role collaborates with other FI SAP Analysts to assist the business users with their ongoing opera

Impact ECS (Product Costing) Engineer role is a key position in the Renesas IT organization to support Product Costing for all aspects of SAP and other Finance Business applications.This role collaborates with other FI SAP Analysts to assist the business users with their ongoing opera