Best NanoTech

RTL Design Engineer DDR Location: Bangalore Experience: 5 Years Education: Bachelors degree in Electrical / Electronics Engineering Job Summary We are looking for an RTL Design Engineer with strong hands-on experience in DDR-related digital design and RTL development. The role inv

RTL Design Engineer DDR Location: Bangalore Experience: 5 Years Education: Bachelors degree in Electrical / Electronics Engineering Job Summary We are looking for an RTL Design Engineer with strong hands-on experience in DDR-related digital design and RTL development. The role inv

Position: Windows Device Driver Engineer Location: Bangalore Experience: 4 8 Years Education: / B.E in Electronics Computer Science or related field Work Mode: Onsite (Customer Office) Role Overview We are looking for engineers with hands-on experience in Windows kernel device driv

Position: Windows Device Driver Engineer Location: Bangalore Experience: 4 8 Years Education: / B.E in Electronics Computer Science or related field Work Mode: Onsite (Customer Office) Role Overview We are looking for engineers with hands-on experience in Windows kernel device driv

Position: Lead Windows Device Driver Location: Bangalore Experience: 10 15 Years Education: / B.E. in Computer Science Electronics or related field Work Mode: Onsite Role Overview The role involves leading the architecture development and optimization of Windows network device

Position: Lead Windows Device Driver Location: Bangalore Experience: 10 15 Years Education: / B.E. in Computer Science Electronics or related field Work Mode: Onsite Role Overview The role involves leading the architecture development and optimization of Windows network device

Memory Design Engineer Location: Bangalore Experience: 4 6 Years Employment Type: Full-Time 1. About the Role We are looking for a Memory Design Engineer with hands-on experience in CMOS memory design and custom digital circuit development. The role involves design simulation verifi

Memory Design Engineer Location: Bangalore Experience: 4 6 Years Employment Type: Full-Time 1. About the Role We are looking for a Memory Design Engineer with hands-on experience in CMOS memory design and custom digital circuit development. The role involves design simulation verifi

AMS Verification Engineer 2 to 3 Years Location: Pune / Bengaluru / Hyderabad India Employment Type: Full-time Role Summary We are looking for an AMS Verification Engineer with 2 3 years of relevant experience in Analog Mixed-Signal verification at IP and SoC level. The role in

AMS Verification Engineer 2 to 3 Years Location: Pune / Bengaluru / Hyderabad India Employment Type: Full-time Role Summary We are looking for an AMS Verification Engineer with 2 3 years of relevant experience in Analog Mixed-Signal verification at IP and SoC level. The role in

Memory Characterization Engineer Location: Bangalore Experience: 4 6 Years Employment Type: Full-Time 1. About the Role We are seeking a Memory Characterization Engineer with hands-on experience in simulation timing/power analysis and characterization of custom memory IPs such as SR

Memory Characterization Engineer Location: Bangalore Experience: 4 6 Years Employment Type: Full-Time 1. About the Role We are seeking a Memory Characterization Engineer with hands-on experience in simulation timing/power analysis and characterization of custom memory IPs such as SR

About the Role Best NanoTech is seeking a Senior Technical Recruiter Semiconductor Talent Acquisition to join our rapidly growing talent acquisition team. You will work directly with Indias leading semiconductor companies startups and technology firms to identify screen and place

About the Role Best NanoTech is seeking a Senior Technical Recruiter Semiconductor Talent Acquisition to join our rapidly growing talent acquisition team. You will work directly with Indias leading semiconductor companies startups and technology firms to identify screen and place

Senior Engineer Flip Chip Packaging Location: Dholera Gujarat Employment Type: Full-Time Industry: Semiconductor Manufacturing / Advanced Packaging Experience: 5 10 Years Role Overview The Senior Engineer Flip Chip Packaging will lead the development qualification and manuf

Senior Engineer Flip Chip Packaging Location: Dholera Gujarat Employment Type: Full-Time Industry: Semiconductor Manufacturing / Advanced Packaging Experience: 5 10 Years Role Overview The Senior Engineer Flip Chip Packaging will lead the development qualification and manuf

DFT Engineer (DFT Feature Verification) - 3 5 Years Location: Hyderabad India Work type: Full-time Role Overview We are looking for a DFT Engineer (3 5 years) to work on DFT feature verification at SoC/ASIC level. The role focuses on building and executing verification for DFT-r

DFT Engineer (DFT Feature Verification) - 3 5 Years Location: Hyderabad India Work type: Full-time Role Overview We are looking for a DFT Engineer (3 5 years) to work on DFT feature verification at SoC/ASIC level. The role focuses on building and executing verification for DFT-r

Lead Engineer Software Development (Viado Design Suite / FPGA EDA) Experience: 12 years Location: Hyderabad (On-site/Hybrid as per business need) Employment Type: Full-time Role Overview We are hiring a Lead Engineer to contribute to the Viado Design Suite software development tea

Lead Engineer Software Development (Viado Design Suite / FPGA EDA) Experience: 12 years Location: Hyderabad (On-site/Hybrid as per business need) Employment Type: Full-time Role Overview We are hiring a Lead Engineer to contribute to the Viado Design Suite software development tea

Lead / Senior Design Verification Engineer (SoC) 7 Years Location: Pune India Experience: 7 years (relevant SoC DV) Role Summary Own and drive SoC Design Verification for complex IP/subsystem/SoC programs. You will manage verification execution build scalable verification enviro

Lead / Senior Design Verification Engineer (SoC) 7 Years Location: Pune India Experience: 7 years (relevant SoC DV) Role Summary Own and drive SoC Design Verification for complex IP/subsystem/SoC programs. You will manage verification execution build scalable verification enviro

FPGA Design Lead Engineer Experience: 8 15 Years Location: Hyderabad Employment Type: Full-time Availability: Immediate / Short Notice Role Overview We are seeking an FPGA Design Lead Engineer with deep expertise in digital logic design and hands-on ownership of FPGA development

FPGA Design Lead Engineer Experience: 8 15 Years Location: Hyderabad Employment Type: Full-time Availability: Immediate / Short Notice Role Overview We are seeking an FPGA Design Lead Engineer with deep expertise in digital logic design and hands-on ownership of FPGA development

FPGA Design Senior Engineer Experience: 6 9 Years Location: Hyderabad Employment Type: Full-time Positions: 7 Availability: Immediate / Short Notice Role Overview We are looking for a Senior FPGA Design Engineer with strong digital design fundamentals and hands-on experience acr

FPGA Design Senior Engineer Experience: 6 9 Years Location: Hyderabad Employment Type: Full-time Positions: 7 Availability: Immediate / Short Notice Role Overview We are looking for a Senior FPGA Design Engineer with strong digital design fundamentals and hands-on experience acr

FPGA Design Engineer Experience: 4 6 Years Location: Hyderabad Employment Type: Full-time Availability: Immediate / Short Notice Role Overview We are seeking an FPGA Design Engineer with strong digital design fundamentals and hands-on experience in FPGA development verification and

FPGA Design Engineer Experience: 4 6 Years Location: Hyderabad Employment Type: Full-time Availability: Immediate / Short Notice Role Overview We are seeking an FPGA Design Engineer with strong digital design fundamentals and hands-on experience in FPGA development verification and

SoC Design Engineer Junior Level (ASIC / SoC) Experience: 3 5 Years Location: Bengaluru India Employment Type: Full-time Education B.E./ or M.E./ in Electronics Electrical Computer Engineering or a related discipline. Role Overview We are seeking a SoC Design Junior Engineer wit

SoC Design Engineer Junior Level (ASIC / SoC) Experience: 3 5 Years Location: Bengaluru India Employment Type: Full-time Education B.E./ or M.E./ in Electronics Electrical Computer Engineering or a related discipline. Role Overview We are seeking a SoC Design Junior Engineer wit

SoC Design Lead Engineer ASIC / SoC (ARM-Based Platforms) Experience: 10 15 Years Location: Bengaluru India Employment Type: Full-time Education B.E./ or M.E./ in Electronics Electrical Computer Engineering or a related field. Role Overview We are seeking an accomplished SoC Des

SoC Design Lead Engineer ASIC / SoC (ARM-Based Platforms) Experience: 10 15 Years Location: Bengaluru India Employment Type: Full-time Education B.E./ or M.E./ in Electronics Electrical Computer Engineering or a related field. Role Overview We are seeking an accomplished SoC Des

Senior Analog Layout Engineer (6-8 Years of Expereince) Bengaluru About the Role The Senior Analog Layout Engineer owns complex AMS and custom digital block layouts within the SoC flow delivering PV clean production ready designs in advanced CMOS. You will translate s

Senior Analog Layout Engineer (6-8 Years of Expereince) Bengaluru About the Role The Senior Analog Layout Engineer owns complex AMS and custom digital block layouts within the SoC flow delivering PV clean production ready designs in advanced CMOS. You will translate s

Analog Layout Engineer (4 6 years) Bengaluru About the role You will independently convert schematics into well structured device cell and block level analog/mixed signal layouts using Cadence Virtuoso working closely with senior layout and analog design engineers. You

Analog Layout Engineer (4 6 years) Bengaluru About the role You will independently convert schematics into well structured device cell and block level analog/mixed signal layouts using Cadence Virtuoso working closely with senior layout and analog design engineers. You

Lead Analog Layout Engineer (10 15 Years) Bengaluru About the Role We are seeking a Lead Analog Layout Engineer to spearhead the custom layout implementation for analog/mixed-signal (AMS) modules and custom-digital blocks within our SoC this role you will be responsible for

Lead Analog Layout Engineer (10 15 Years) Bengaluru About the Role We are seeking a Lead Analog Layout Engineer to spearhead the custom layout implementation for analog/mixed-signal (AMS) modules and custom-digital blocks within our SoC this role you will be responsible for

Job Summary We are looking for a skilled Design for Test (DFT) Lead Engineer with 4 6 years of hands-on experience in ASIC/SoC development. The ideal candidate will drive DFT architecture ATPG execution and test coverage improvement while collaborating closely with design physical i

Job Summary We are looking for a skilled Design for Test (DFT) Lead Engineer with 4 6 years of hands-on experience in ASIC/SoC development. The ideal candidate will drive DFT architecture ATPG execution and test coverage improvement while collaborating closely with design physical i