NXP Semiconductors

The Automotive Ethernet Segment (AES) is part of the Product Line (PL) In-Vehicle Networking (IVN) and is one of the fastest growing product segments within NXP. We are seeking a junior marketing manager to develop the product strategy and drive revenue growth for our Automotive Ether

The Automotive Ethernet Segment (AES) is part of the Product Line (PL) In-Vehicle Networking (IVN) and is one of the fastest growing product segments within NXP. We are seeking a junior marketing manager to develop the product strategy and drive revenue growth for our Automotive Ether

Maintain the overall calibration system to be in compliance with IATF 16949.Maintain all calibration standards used in the lab and its traceability to NIST or other national labs.Establish calibration failure reporting and take corrective action and follow up system.Continuously upgra

Maintain the overall calibration system to be in compliance with IATF 16949.Maintain all calibration standards used in the lab and its traceability to NIST or other national labs.Establish calibration failure reporting and take corrective action and follow up system.Continuously upgra

Company DescriptionNXP Semiconductors enables secure connections and infrastructure for a smarter world advancing solutions that make lives easier better and safer. As the world leader in secure connectivity solutions for embedded applications we are driving innovation in the secure c

Company DescriptionNXP Semiconductors enables secure connections and infrastructure for a smarter world advancing solutions that make lives easier better and safer. As the world leader in secure connectivity solutions for embedded applications we are driving innovation in the secure c

Job Description: development based on NXP MCU and MPU. design and technical application documents. systems engineer for general applications and segment applications. benchmark for MCU or MPU.Job Qualification: Microelectronics Electronics Electrical Engineering Computer Science or re

Job Description: development based on NXP MCU and MPU. design and technical application documents. systems engineer for general applications and segment applications. benchmark for MCU or MPU.Job Qualification: Microelectronics Electronics Electrical Engineering Computer Science or re

We have a new opportunity for a Program Manager AI/MLAre you ready to take on a new challenge in your careerOwing to the success of our business our department is growing. We are looking for an enthusiastic Program Manager to join our Secure IP team with an additional focus on integra

We have a new opportunity for a Program Manager AI/MLAre you ready to take on a new challenge in your careerOwing to the success of our business our department is growing. We are looking for an enthusiastic Program Manager to join our Secure IP team with an additional focus on integra

We are currently looking for an experienced Project Manager.You will be an integral member of the Project Management Office for the Competence Center for Crypto and Security a central organization within NXP that drives and develops security solutions.As a Project Manager your respons

We are currently looking for an experienced Project Manager.You will be an integral member of the Project Management Office for the Competence Center for Crypto and Security a central organization within NXP that drives and develops security solutions.As a Project Manager your respons

Leading design micro-architecture and integration of the System on Chip (SOC) from initial specification till tape out and beyondDrive and implement best SoC design methodology/practices and scale it across different business lines.Signing off RTL timing constraints CDC RDC and work w

Leading design micro-architecture and integration of the System on Chip (SOC) from initial specification till tape out and beyondDrive and implement best SoC design methodology/practices and scale it across different business lines.Signing off RTL timing constraints CDC RDC and work w

Senior DFT engineer preferably with 10 yrs experience in SoC DFT implementation and verification of scan architectures JTAG boundary scan memory BIST ATPG and LBIST.BE/ME/ from reputed institutes with relevant industry experienceThe engineer should be well versed in Verilog/VHDL RTL c

Senior DFT engineer preferably with 10 yrs experience in SoC DFT implementation and verification of scan architectures JTAG boundary scan memory BIST ATPG and LBIST.BE/ME/ from reputed institutes with relevant industry experienceThe engineer should be well versed in Verilog/VHDL RTL c

This position is for a systems engineer in automotive systems engineering and marketing organization of NXP. This organization targets to make NXP the trusted partner advisor and then provider of customers vehicle architectures and system that position the talented employee will part

This position is for a systems engineer in automotive systems engineering and marketing organization of NXP. This organization targets to make NXP the trusted partner advisor and then provider of customers vehicle architectures and system that position the talented employee will part

Job Responsibility:Support ATBK site Finance Controller Site GM and factory stakeholders in financial planning and analysisDevelop and deploy annual departmental goals and lead FP&A team to ensure timely and accurate financial reportingAlign A&T annual targets with ATBK manufacturing

Job Responsibility:Support ATBK site Finance Controller Site GM and factory stakeholders in financial planning and analysisDevelop and deploy annual departmental goals and lead FP&A team to ensure timely and accurate financial reportingAlign A&T annual targets with ATBK manufacturing

Responsibilities: Responsible for driving business growth for ADAS products across South Asia Pacific region.Own and drive region specific KPIs for ADAS business Opportunity Funnel management DIN DWIN Revenue targets POA POS Long Term planningAnalyse & understand regional market tr

Responsibilities: Responsible for driving business growth for ADAS products across South Asia Pacific region.Own and drive region specific KPIs for ADAS business Opportunity Funnel management DIN DWIN Revenue targets POA POS Long Term planningAnalyse & understand regional market tr

Are you inspired by machine learning data AI currently pursuing your studies and ready for a new challenge working on AI compiler technologies Do you want to contribute to real world applications and gain experience developing innovative ideas Then you will want to be a part of the gr

Are you inspired by machine learning data AI currently pursuing your studies and ready for a new challenge working on AI compiler technologies Do you want to contribute to real world applications and gain experience developing innovative ideas Then you will want to be a part of the gr

Your Team Improve Material Management organisationYour Responsibilities Define: Make a Project Charter what make clear for all parties what the expectations are.Measure: Investigate what the customer wants define KPIs and validate the KPI;Analyse: find out what the customer wants what

Your Team Improve Material Management organisationYour Responsibilities Define: Make a Project Charter what make clear for all parties what the expectations are.Measure: Investigate what the customer wants define KPIs and validate the KPI;Analyse: find out what the customer wants what

The Site and Process Security Certification (SPSC) team forms an integral part of the Competence Center Crypto & Security (CCC&S) within the NXP CTO organisation. The primary aim of this team is to support NXPs various business units in matters relating to product certification and to

The Site and Process Security Certification (SPSC) team forms an integral part of the Competence Center Crypto & Security (CCC&S) within the NXP CTO organisation. The primary aim of this team is to support NXPs various business units in matters relating to product certification and to

CTO/Frontend Innovation/NVM Design Department is responsible for all embedded Non-Volatile Memory deployment across NXP business and product lines. Embedded NVM encompasses nearly all technology nodes and products which integrate Logic NVM Flash or disruptive memory solutions (e.g. RR

CTO/Frontend Innovation/NVM Design Department is responsible for all embedded Non-Volatile Memory deployment across NXP business and product lines. Embedded NVM encompasses nearly all technology nodes and products which integrate Logic NVM Flash or disruptive memory solutions (e.g. RR

Job SummaryWe are seeking a highly skilled Principal MEMS Design Engineer to join our sensor development team. This role focuses on the design and optimization of MEMS-based inertial sensors for Inertial Measurement Units (IMUs). The ideal candidate will lead innovative design efforts

Job SummaryWe are seeking a highly skilled Principal MEMS Design Engineer to join our sensor development team. This role focuses on the design and optimization of MEMS-based inertial sensors for Inertial Measurement Units (IMUs). The ideal candidate will lead innovative design efforts

Your Team Improve logistic performance fabYour Responsibilities Define: Make a Project Charter what make clear for all parties what the expectations are.Measure: Investigate what the customer wants define KPIs and validate the KPI;Analyse: find out what the customer wants what the gap

Your Team Improve logistic performance fabYour Responsibilities Define: Make a Project Charter what make clear for all parties what the expectations are.Measure: Investigate what the customer wants define KPIs and validate the KPI;Analyse: find out what the customer wants what the gap

Research ProjectFuture generation automotive receivers for eg. FMCW MIMO radar reception require increasing larger bandwidths higher dynamic range and spectral purity at low-power consumption. Conventional CT ADC architectures such as continuous-time sigma-delta (SD) pipeline (CTP) an

Research ProjectFuture generation automotive receivers for eg. FMCW MIMO radar reception require increasing larger bandwidths higher dynamic range and spectral purity at low-power consumption. Conventional CT ADC architectures such as continuous-time sigma-delta (SD) pipeline (CTP) an

Job Title: Business AnalystPrimary Location: San Diego CAAbout the RoleJoin our Digital IP Development team as a Business Analytics Intern and help shape the future of IP effort forecasting. This internship offers a unique opportunity to build Power BI dashboards and design a scalable

Job Title: Business AnalystPrimary Location: San Diego CAAbout the RoleJoin our Digital IP Development team as a Business Analytics Intern and help shape the future of IP effort forecasting. This internship offers a unique opportunity to build Power BI dashboards and design a scalable

Business Line Description:NXPs Advance Chip Engineering (ACE) team is a central engineering organization responsible for developing and delivering Systems-on-a-Chip (SoCs) for NXPs Automotive Edge and Radar Processing business lines. MMEs SoC Hardware Architecture team produces archit

Business Line Description:NXPs Advance Chip Engineering (ACE) team is a central engineering organization responsible for developing and delivering Systems-on-a-Chip (SoCs) for NXPs Automotive Edge and Radar Processing business lines. MMEs SoC Hardware Architecture team produces archit